Detect localization

Integrated circuit and semiconductor test with laser.

In the frame of classical failure analysis process, defect localization is a key point. Different kind of defect can be found inside integrated circuits, at the semiconductor level, at the oxides level and at the metallization level. Optical techniques have proven their efficiency to detect these different kinds of defect.

In collaboration with the French spatial agency (CNES) and ST microelectronics, our team has worked on the following techniques:

  • Optical Beam Induced Current (OBIC) technique, relying on a photoelectric interaction of laser pulses inside the semiconductor.
  • Optical Beam Induced Resistance Change (OBIRCh) technique, relying on a photothermic interaction of a laser beam and a metal layer.
  • Photon Emission Microscopy (PEM), which consists in the detection of photons emitted by the device.
  • Laser Voltage Probing (LVP), consisting in analyzing a laser beam reflected by the active layer of the device.

OBIC and OBIRCh techniques are classified as pump technique, because they modify the behavior of the device to enhance the potential effect of a defect. PEM and LVP techniques are classified as probe techniques, because they don’t modify the device behavior.

Each of these techniques has in common the necessity to compare a mapping of the faulty device to one of a pristine device of the same lot. The defect presence is generally clearly seen on the mapping. Figure 1 presents an example of defect localization in an integrated CMOS inverter, embedded in a ring oscillator. The defect is due to an ESD stress applied on the ring oscillator.

PEM, OBIRCh and OBIC images of a CNOMS inverter

In the case depicted in figure 1, PEM, OBIRCh and OBIC techniques reveal the same defect location. But the OBIC technique seems to give a better location as two defects are detected.

Figure 2 presents an example of LVP results obtained on integrated NPN bipolar transistors. The plotted value Rmean corresponds to the LVP signal given by a lock-in amplifier, as a function of the collector-emitter bias (Vbe=0.74 V). The LVP probing has been done under the emitter contact (E in figure 2), the base contact (B in figure 2) and the collector contact (C in figure 2). Q4 is the pristine transistor and Q3 is the faulty one. The LVP response of the two transistors are comparable when probing under the emitter but very different in the other cases.

: LVP signal as a function of Vce  at different positions

All these techniques don’t induce a permanent failure inside the chip, they are called noninvasive techniques.

The optical techniques have been developed and matured on silicon technology, but they are facing a limit due to the reduction of the elementary node’s size in highly integrated circuits. This constitutes a hotspot in this area.

Another hotspot we are working on is the development of techniques to do defect localization in high bandgap technologies.


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